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Senior ASIC RTL Engineer (25465)

to £55k plus benefits

Design for Test using ATPG

This hardware and software company produce high speed digital hardware for consumers and businesses. They are seeking an RTL engineer skilled in DFT and ATPG for ASIC design. Hence this is an electronics design role, not a test role, but focusing on test logic.

You will have a good degree in a relevant subject from a reputable university and full existing UK work permission without time limit, restriction or sponsorship. You’ll have several years’ commercial experience as an ASIC RTL hardware designer working in VHDL/Verilog. You may be a specialist in DFT or a generalist with prior experience.

You will be very familiar with automatic test pattern generation (ATPG), in particular with reducing the scope and complexity to achieve full coverage with minimal process (test compression, serialization). You’ll be confident building test logic, and modifying existing logic without excessive overhead to accommodate test facilities (e.g. via scan insertion).

You’ll be confident verifying and debugging designs through simulation using common tools. You’ll also be familiar with Synopsys (or comparable) ATPG tools, and with BIST for typical embedded board-level components (e.g. DDR SDRAM).

Interested? Send your CV to ECM Selection; whilst we can only put forward the top few candidates, we do read every CV and try to respond to everyone. If you’re already registered with us, recommend a friend for £250 – see http://www.ecmselection.co.uk/tell-a-friend.

Keywords: ATPG, DFT, implementation, validation, compression, serialization, constraints, gate-level simulation, VHDL, Verilog, System Verilog, vector generation, high speed digital.

Please note: even if you don't have exactly the background indicated, do contact us now if this type of job is of interest - we may well have similar opportunities that you would be suited to. And of course, we always get your permission before submitting your CV to a company.